;**********************************************************************
;                                                                     *
;    Filename:	    crctest.asm                                       *
;    Date:          18 Jul 2002                                       *
;    File Version:  1                                                 *
;                                                                     *
;    Author:        Chris White (whitecf@bcs.org.uk)                  *
;    Company:       Monitor Computing Services Ltd.                   *
;                                                                     *
;**********************************************************************
;                                                                     *
;    Copyright (C) 2002  Monitor Computing Services Ltd.              *
;                                                                     *
;    This program is free software; you can redistribute it and/or    *
;    modify it under the terms of the GNU General Public License      *
;    as published by the Free Software Foundation; either version 2   *
;    of the License, or any later version.                            *
;                                                                     *
;    This program is distributed in the hope that it will be useful,  *
;    but WITHOUT ANY WARRANTY; without even the implied warranty of   *
;    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the    *
;    GNU General Public License for more details.                     *
;                                                                     *
;    You should have received a copy of the GNU General Public        *
;    License (http://www.gnu.org/copyleft/gpl.html) along with this   *
;    program; if not, write to:                                       *
;       The Free Software Foundation Inc.,                            *
;       59 Temple Place - Suite 330,                                  *
;       Boston, MA  02111-1307,                                       *
;       USA.                                                          *
;                                                                     *
;**********************************************************************
;                                                                     *
;    Notes: 'Main' program to test CRC16 algorithm implementations.   *
;                                                                     *
;**********************************************************************


	list      p=16C84

#include <c:\pic\mplab\inc\p16C84.inc>

	__CONFIG   _CP_OFF & _WDT_OFF & _PWRTE_ON & _XT_OSC

; '__CONFIG' directive is used to embed configuration data within .asm file.
; The lables following the directive are located in the respective .inc file.
; See respective data sheet for additional information on configuration word.


;**********************************************************************
; Include and configuration directives                                *
;**********************************************************************

#include <crc_citt.inc>


;**********************************************************************
; Constant definitions                                                *
;**********************************************************************



;**********************************************************************
; Variable definitions                                                *
;**********************************************************************

		CBLOCK  0x0C

; Status and accumulator storage registers
w_isr         ; 'w' register, accumulator, store during ISR
pclath_isr    ; PCLATH register store during ISR
status_isr    ; status register store during ISR

; Test data byte
testByte

; HDLC CRC values

hdlcCrc1H
hdlcCrc1L
hdlcCrc2H
hdlcCrc2L

		ENDC


;**********************************************************************
; Reset vector                                                        *
;**********************************************************************

		ORG     0x000             ; Processor reset vector
BootVector	clrf    INTCON            ; Disable interrupts
		clrf    INTCON            ; Ensure interrupts are disabled
  		goto    Main              ; Jump to beginning of program


;**********************************************************************
; Interrupt vector                                                    *
;**********************************************************************

		ORG     0x004             ; Interrupt vector location
IntVector	movwf   w_isr             ; Save off current W register contents
		swapf	STATUS,W          ; Move status register into W register
		BANKSEL TMR0              ; Ensure register page 0 is selected
		movwf	status_isr        ; save off contents of STATUS register
		movf	PCLATH,W          ; Move PCLATH register into W register
		movwf	pclath_isr        ; save off contents of PCLATH register
		movlw   high BeginISR     ; Load ISR address high byte ...
		movwf   PCLATH            ; ... into PCLATH to set code block
		goto    BeginISR          ; Jump to interrupt service routine


;**********************************************************************
; Interrupt service routine (ISR) code                                *
;**********************************************************************

BeginISR	btfss   INTCON,T0IF       ; Skip if RTCC interrupt flag is set ...
		goto    EndISR            ; ... otherwise jump to end of service routine

		BANKSEL TMR0              ; Ensure register page 0 is selected
#ifdef CLKPORT
		bcf     CLKPORT,CLKBIT    ; Set clock output low
#endif
		bcf     INTCON,T0IF       ; Clear the RTCC interrupt bitflag

#ifdef CLKPORT
		bsf     CLKPORT,CLKBIT    ; Set clock output high
#endif

EndISR		movf    pclath_isr,W      ; Retrieve copy of PCLATH register
		movwf	PCLATH            ; Restore pre-isr PCLATH register contents
		movf    status_isr,W      ; Retrieve copy of STATUS register
		movwf	STATUS            ; Restore pre-isr STATUS register contents
		swapf   w_isr,F
		swapf   w_isr,W           ; Restore pre-isr W register contents

		retfie                    ; Return from interrupt


;**********************************************************************
; Main program code                                                   *
;**********************************************************************

CRCHDLC		macro   testData, hdlcCrcL, hdlcCrcH

		movlw   testData
		movwf   testByte
		CrcHDLC testByte, hdlcCrcL, hdlcCrcH

		endm

Main		clrf    PORTA             ; Clear I/O ports
		clrf    PORTB

		; Test HDLC CRC

		clrf    hdlcCrc1H
		decf    hdlcCrc1H,F
		clrf    hdlcCrc1L
		decf    hdlcCrc1L,F

		CRCHDLC '0', hdlcCrc1L, hdlcCrc1H
		CRCHDLC '1', hdlcCrc1L, hdlcCrc1H
		CRCHDLC '2', hdlcCrc1L, hdlcCrc1H
		CRCHDLC '3', hdlcCrc1L, hdlcCrc1H
		CRCHDLC '4', hdlcCrc1L, hdlcCrc1H
		CRCHDLC '5', hdlcCrc1L, hdlcCrc1H
		CRCHDLC '6', hdlcCrc1L, hdlcCrc1H
		CRCHDLC '7', hdlcCrc1L, hdlcCrc1H
		CRCHDLC '8', hdlcCrc1L, hdlcCrc1H
		CRCHDLC '9', hdlcCrc1L, hdlcCrc1H
		CRCHDLC 'A', hdlcCrc1L, hdlcCrc1H
		CRCHDLC 'B', hdlcCrc1L, hdlcCrc1H
		CRCHDLC 'C', hdlcCrc1L, hdlcCrc1H
		CRCHDLC 'D', hdlcCrc1L, hdlcCrc1H
		CRCHDLC 'E', hdlcCrc1L, hdlcCrc1H
		CRCHDLC 'F', hdlcCrc1L, hdlcCrc1H

		clrf    hdlcCrc2H
		decf    hdlcCrc2H,F
		clrf    hdlcCrc2L
		decf    hdlcCrc2L,F

		CRCHDLC 'H', hdlcCrc2L, hdlcCrc2H
		CRCHDLC 'e', hdlcCrc2L, hdlcCrc2H
		CRCHDLC 'l', hdlcCrc2L, hdlcCrc2H
		CRCHDLC 'l', hdlcCrc2L, hdlcCrc2H
		CRCHDLC 'o', hdlcCrc2L, hdlcCrc2H

		sleep


		end                       ; directive 'end of program'


